ISLAMIC UNIVERSITY OF KENYA

(IUK)

DEPARTMENT OF INFORMATION TECHNOLOGY OPEN AND DISTANCE e-LEARNING

COURSE OUTLINE: CSC116 - DIGITAL LOGIC DESIGN

1. Course Overview

1.1 Course Purpose

To introduce students to digital electronics concepts and provide a strong foundation of basic principles through the classical approach before engaging in a practical design approach. This course covers the use of digital electronic technology and concepts, which form the basis for all current computer hardware technology.

1.2 Course Objectives / Learning Outcomes

By the end of this ODeL course unit, a student should be able to:

1. Describe and implement fundamental digital electronic concepts and number systems.
2. Analyze and minimize logic expressions using Boolean algebra and Karnaugh maps.
3. Design and build simple combinational and sequential digital devices.
4. Develop a hands-on understanding (via virtual labs/simulations) of the design of digital circuits and the basic components of complete computer hardware technology.

2. ODeL Instructional Schedule & Weekly Content

Each module includes core readings, video lectures, self-assessment quizzes, and a mandatory discussion forum prompt to ensure peer-to-peer and learner-instructor interaction.

Module 1: Introduction to Digital Systems & Number Systems (Weeks 1 & 2)

• Core Topics:
• Introduction to Digital vs. Analog Systems
• Number Systems: Decimal, Binary, Octal, and Hexadecimal
• Basic Binary Arithmetic (Addition, Subtraction, Multiplication, Division)
• Conversions between various number systems (including fractional conversions)
• Complements: Decimal (9’s and 10’s) and Binary (1’s and 2’s)
• Signed Numbers representation
• ODeL Activities:
• Self-Assessment: Number system conversion quiz.
• Discussion Forum: "Discuss the advantages of using Hexadecimal and Binary systems in modern computer architecture."

Module 2: Binary Codes (Weeks 3 & 4)

• Core Topics:
• Classification of Codes: Numeric vs. Alphanumeric
• 8-4-2-1 BCD (Binary Coded Decimal) Code and Arithmetic
• Excess-3 Code and its self-complementing properties
• Error Detecting Codes (Parity bits, Block parity)
• Gray Code (Minimum change code) and conversions
• ODeL Activities:
• Virtual Lab: Simulating BCD addition and error detection using logic simulation software (e.g., Proteus or Multisim).
• Discussion Forum: "Why is Gray code preferred over binary in shaft encoders and analog-to-digital converters?"

Module 3: Logic Gates & Networks (Weeks 5 & 6)

• Core Topics:
• Fundamental Gates: AND, OR, NOT
• Universal Gates: NAND, NOR (and realization of basic gates using them)
• Special Gates: Exclusive-OR (XOR) and Exclusive-NOR (XNOR)
• Constructing Truth Tables and Logic Expressions from diagrams
• Two-level Implementation of Logic Networks (Wired-AND, Wired-OR)
• ODeL Activities:
• Interactive Exercise: Drag-and-drop gate matching on the LMS.
• Assignment 1 (CAT 1): Design a logic circuit for a given real-world scenario (e.g., aircraft engine safety system) and submit via the LMS.

Module 4: Boolean Algebra & Minimization Techniques (Weeks 7, 8 & 9)

• Core Topics:
• Postulates, Theorems, and Boolean Relations (Commutative, Associative, Distributive, De Morgan’s)
• Simplifying Expressions using Boolean Algebra
• Standard Forms: Minterms (Sum of Products) and Maxterms (Product of Sums)
• Karnaugh Map (K-Map) Reduction: 2, 3, and 4-variable maps
• Don’t Care Conditions and Redundant Groups
• Introduction to Tabulation Methods (Quine-McCluskey)
• ODeL Activities:
• Video Lectures: Step-by-step K-Map grouping techniques.
• Peer Review: Students post a complex Boolean expression, and peers attempt to minimize it using K-Maps on the forum.

Module 5: Digital Circuits - Combinational & Sequential (Weeks 10, 11 & 12)

• Core Topics:
• Combinational Circuits: Design procedures, Half and Full Adders, Subtractors, Magnitude Comparators, Multiplexers (Data Selectors), and Encoders.
• MSI & LSI Applications: Using commercial ICs for practical design.
• Sequential Circuits: Synchronous vs. Asynchronous circuits.
• Memory Elements: Flip-Flops (S-R, J-K, Master-Slave), Triggering techniques (Level vs. Edge).
• Registers & Counters: Shift registers (SISO, SIPO, PISO, PIPO), Ring counters, Johnson counters.
• State Machine Theory: Mealy and Moore machines, Algorithmic State Machine (ASM) charts.
• ODeL Activities:
• Virtual Lab: Building a 4-bit Adder/Subtractor and a Ring Counter using virtual ICs.
• Final Project: Design a synchronous sequential circuit (State Machine) for a specific automated control system and present via a recorded video submission.

3. Mode of Assessment

In alignment with IUK's ODeL assessment policies, continuous assessment is heavily emphasized to monitor the progress of distance learners.

• Pass Mark: 40%

4. Instructional Materials & References

Students are required to access the following texts via the IUK Virtual Library or the ODeL LMS resource repository:

1. Shaba, A. & Maana, N. - Digital Principles and Logic Designs.
2. Roth, C.H. (1992) - Fundamentals of Logic Design.
3. Yorbrough, J.M. (1997) - Digital Logic Applications and Design.
4. Alan, C. (1997) - Microprocessor Systems Design.
5. Bartlet, Terry (2002) - Digital Electronics.
6. Dixon, Allan (2000) - A Practical Approach to Digital Electronics.

5. ODeL Learner Support & Guidelines

• Time Management: Digital Logic requires consistent practice. Dedicate at least 6-8 hours per week to reading, virtual labs, and forum participation.
• Software Requirements: Students must install a digital logic simulator (e.g., Logisim, Multisim, or Proteus) on their personal computers to complete the practical design assignments.
• Instructor Consultations: Virtual office hours will be held every Wednesday via Zoom/Teams. Discussion forums are monitored daily, and instructor feedback will be provided within 48 hours.

Introduction to computer programming using C++ language. Emphasis on the fundamentals of

object-oriented design with development, testing, implementation, and documentation. Includes language syntax, data and file structures, input/output devices, and files.

THIS IS A SAMPLE DESCRIPTION